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 LK115XX30 LK115XX33 - LK115XX50
Very low drop with inhibit voltage regulators
Features

Very low dropout voltage (0.2 V typ.) Very low quiescent current (Typ. 0.01 A in off mode, 280 A in on mode) Output current up to 100 mA Two logic-controlled electronic shutdowns Output voltages of 3.0; 3.3; 5.0 V Internal current and thermal limit Only 2.2 F for stability VOUT tolerance 3 % at 25 C Supply voltage rejection: 80 dB (typ) Temperature range: -40 C to 125 C It requires only a 2.2 F capacitor for stability allowing space and cost saving.
SO-8
Description
The LK115XX series are very low drop regulators available in SO-8 package and in a wide range of output voltages. The very low drop voltage (0.2 V) and the very low quiescent current (0.01 A in OFF MODE, 280 A in ON MODE) make them particularly suitable for low noise, low power applications and specially in battery powered systems. Both active HIGH and active LOW shutdown logic control are available (pin 2 and 3). This means that when the device is used as a local regulator, it is possible to put a part of the board in standby, decreasing the total power consumption.
Table 1.
Device summary
Order codes LK115D30-TR LK115D33-TR LK115D50-TR Output voltages 3V 3.3 V 5V
July 2008
Rev 4
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Contents
LK115XX30 - LK115XX33 - LK115XX50
Contents
1 2 3 4 5 6 7 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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LK115XX30 - LK115XX33 - LK115XX50
Diagram
1
Figure 1.
Diagram
Schematic diagram
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Pin configuration
LK115XX30 - LK115XX33 - LK115XX50
2
Figure 2.
Pin configuration
Pin connection (top view)
Table 2.
Truth table
ON/OFF (Pin 2) H H L L ON/OFF (Pin 3) L H L H Status ON OFF OFF NOT ALLOWED
Note:
Logic levels are those defined in the electrical characteristics.
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LK115XX30 - LK115XX33 - LK115XX50
Maximum ratings
3
Table 3.
Maximum ratings
Absolute maximum ratings
Parameter DC input voltage Output current Power dissipation Storage temperature range Operating junction temperature range Value 20 Internally limited Internally limited -40 to 150 -40 to 125 C C Unit V
Symbol VI IO PTOT TSTG TOP
Note:
Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
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Test circuits
LK115XX30 - LK115XX33 - LK115XX50
4
Figure 3.
Test circuits
Supply current (On mode)
Figure 4.
Supply current (Off mode)
Note:
The switch emulates the two possibilities to set the regulator in OFF mode.
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LK115XX30 - LK115XX33 - LK115XX50
Electrical characteristics
5
Table 4.
Symbol VO VI Iout VO VO
Electrical characteristics
Electrical characteristics for LK115D30 (refer to the test circuits, TJ = 25 C, CI = 0.1 F, CO = 2.2 F unless otherwise specified.)
Parameter Output voltage Operating input voltage Output current limit Line regulation Load regulation Quiescent current (On Mode) (Off Mode) VI = 4 to 20 V, IO = 0.5 mA VI = 4 V, IO = 0.5 to 100 mA VI = 4 to 20 V, IO = 0 VI = 4 to 20 V, IO = 100 mA VI = 4 to 20 V f = 120 Hz SVR Supply voltage rejection IO = 5 mA VI = 5 V 1V f = 1 kHz f = 10 kHz eN Vd VHIc Output noise voltage (RMS) Dropout voltage ON/OFF Control (pin 2) Pin 3 to GND, ON ON/OFF Control (pin 3) Output bypass capacitance Pin 2 to Vin, OFF Pin 2 to Vin, ON ESR = 0.5 to 10 , IO = 0 to 100 mA 2.4 Vin-0.2 0 2 10 Vin Vin Vin-2.4 F V B = 10 Hz to 100 kHz IO = 60 mA Pin 3 to GND, OFF 0 Test conditions IO = 10 mA, VI = 5 V IO = 10 mA, VI = 5 V, Ta= -40 to 125C IO = 100 mA 120 200 2 4 0.28 1.5 0.01 79 74 57 66 0.17 0.5 V V V dB 10 20 0.5 mA 3 2 A Min. 2.910 2.850 Typ. 3 Max. 3.090 V 3.150 20 V mA mV mV Unit
Id
VLIc CO
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Electrical characteristics Table 5.
Symbol VO VI Iout VO VO
LK115XX30 - LK115XX33 - LK115XX50
Electrical characteristics for LK115D33 (refer to the test circuits, TJ = 25 C, CI = 0.1 F, CO = 2.2 F unless otherwise specified.)
Parameter Output voltage Operating input voltage Output current limit Line regulation Load regulation Quiescent current (On Mode) (Off Mode) VI = 4.3 to 20 V, IO = 0.5 mA VI = 4.3 V, IO = 0.5 to 100 mA VI = 4.3 to 20 V, IO = 0 VI = 4.3 to 20 V, IO = 100 mA VI = 4.3 to 20 V f = 120 Hz IO = 5 mA VI = 5.3 V 1V Test conditions IO = 10 mA, VI = 5.3 V IO = 10 mA, VI = 5.3 V, Ta= -40 to 125C IO = 100 mA 120 200 2 4 0.28 1.5 0.01 79 74 57 72.6 0.17 0 2.4 Vin-0.2 0 2 10 0.5 V Pin 3 to GND, ON ON/OFF Control (pin 3) Output bypass capacitance Pin 2 to Vin, OFF Pin 2 to Vin, ON ESR = 0.5 to 10, IO = 0 to 100 mA Vin Vin Vin-2.4 F V V V dB 10 20 0.5 mA 3 2 A Min. 3.2 3.135 Typ. 3.3 Max. 3.4 V 3.465 20 V mA mV mV Unit
Id
SVR
Supply voltage rejection
f = 1 kHz f = 10 kHz
eN Vd VHIc
Output noise voltage (RMS) Dropout voltage ON/OFF Control (pin 2)
B = 10 Hz to 100 kHz IO = 60 mA Pin 3 to GND, OFF
VLIc CO
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LK115XX30 - LK115XX33 - LK115XX50 Table 6.
Symbol VO VI Iout VO VO
Electrical characteristics
Electrical characteristics for LK115D50 (refer to the test circuits, TJ = 25 C, CI = 0.1 F, CO = 2.2 F unless otherwise specified.)
Parameter Output voltage Operating input voltage Output current limit Line regulation Load regulation Quiescent current (On Mode) (Off Mode) VI = 6 to 20 V, IO = 0.5 mA VI = 6 V, IO = 0.5 to 100 mA VI = 6 to 20 V, IO = 0 VI = 6 to 20 V, IO = 100 mA VI = 6 to 20 V f = 120 Hz IO = 5 mA VI = 7 V 1V Test conditions IO = 10 mA, VI = 7 V IO = 10 mA, VI = 7 V, Ta= -40 to 125C IO = 100 mA 120 200 3 4 0.28 1.5 0.01 75 70 55 110 0.17 0 2.4 Vin-0.2 0 2 10 0.5 V Pin 3 to GND, ON ON/OFF Control (pin 3) Output bypass capacitance Pin 2 to Vin, OFF Pin 2 to Vin, ON ESR = 0.5 to 10, IO = 0 to 100 mA Vin Vin Vin-2.4 F V V V dB 15 20 0.5 mA 3 2 A Min. 4.85 4.75 Typ. 5 Max. 5.15 V 5.25 20 V mA mV mV Unit
Id
SVR
Supply voltage rejection
f = 1 kHz f = 10 kHz
eN Vd VHIc
Output noise voltage (RMS) Dropout voltage ON/OFF Control (pin 2)
B = 10 Hz to 100 kHz IO = 60 mA Pin 3 to GND, OFF
VLIc CO
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Package mechanical data
LK115XX30 - LK115XX33 - LK115XX50
6
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
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LK115XX30 - LK115XX33 - LK115XX50
Package mechanical data
SO-8 mechanical data
Dim. A A1 A2 B C D E e H h L k ddd 0.1 5.80 0.25 0.40 mm. Min. 1.35 0.10 1.10 0.33 0.19 4.80 3.80 1.27 6.20 0.50 1.27 8 (max.) 0.04 0.228 0.010 0.016 Typ. Max. 1.75 0.25 1.65 0.51 0.25 5.00 4.00 Min. 0.053 0.04 0.043 0.013 0.007 0.189 0.150 0.050 0.244 0.020 0.050 inch. Typ. Max. 0.069 0.010 0.065 0.020 0.010 0.197 0.157
0016023/C
11/14
Package mechanical data
LK115XX30 - LK115XX33 - LK115XX50
Tape & reel SO-8 mechanical data
mm. Dim. Min. A C D N T Ao Bo Ko Po P 8.1 5.5 2.1 3.9 7.9 12.8 20.2 60 22.4 8.5 5.9 2.3 4.1 8.1 0.319 0.216 0.082 0.153 0.311 Typ. Max. 330 13.2 0.504 0.795 2.362 0.882 0.335 0.232 0.090 0.161 0.319 Min. Typ. Max. 12.992 0.519 inch.
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LK115XX30 - LK115XX33 - LK115XX50
Revision history
7
Table 7.
Date
Revision history
Document revision history
Revision 3 4 Order codes updated. Added Table 1 on page 1. Changes
07-Jun-2006 07-Jul-2008
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LK115XX30 - LK115XX33 - LK115XX50
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